Filter
Top Products
Chapter 21 Interrupt (S12MC9S12XDP512V1)
MC9S12XDP512 Data Sheet, Rev. 2.11
852
PRELIMINARY Freescale Semiconductor
NON-DISCLOSURE AGREEMENT REQUIRED
21.3.1.4 Interrupt Request Configuration Data Registers (INT_CFDATA0–7)
The eight register window visible at addresses INT_CFDATA0–7 contains the configuration data for the
block of eight interrupt requests (out of 128) selected by the interrupt configuration address register
(INT_CFADDR) in ascending order. INT_CFDATA0 represents the interrupt configuration data register
of the vector with the lowest address in this block, while INT_CFDATA7 represents the interrupt
configuration data register of the vector with the highest address, respectively.
Address: 0x0128
76543210
R
RQST
0000
PRIOLVL[2:0]
W
Reset 00000001
1
1
Please refer to the notes following the PRIOLVL[2:0] description below.
= Unimplemented or Reserved
Figure 21-6. Interrupt Request Configuration Data Register 0 (INT_CFDATA0)
Address: 0x0129
76543210
R
RQST
0000
PRIOLVL[2:0]
W
Reset 00000001
1
1
Please refer to the notes following the PRIOLVL[2:0] description below.
= Unimplemented or Reserved
Figure 21-7. Interrupt Request Configuration Data Register 1 (INT_CFDATA1)
Address: 0x012A
76543210
R
RQST
0000
PRIOLVL[2:0]
W
Reset 00000001
1
1
Please refer to the notes following the PRIOLVL[2:0] description below.
= Unimplemented or Reserved
Figure 21-8. Interrupt Request Configuration Data Register 2 (INT_CFDATA2)
Address: 0x012B
76543210
R
RQST
0000
PRIOLVL[2:0]
W
Reset 00000001
1
1
Please refer to the notes following the PRIOLVL[2:0] description below.
= Unimplemented or Reserved
Figure 21-9. Interrupt Request Configuration Data Register 3 (INT_CFDATA3)