Chapter 9 XGATE (S12XGATEV2)
MC9S12XDP512 Data Sheet, Rev. 2.11
Freescale Semiconductor 419
Operation
FirstOne (RS) ⇒ RD;
Searches the first “1” beginning from the MSB=15 down to LSB=0 in register RS and places the result into
the destination register RD. The upper bits of RD are cleared. In case the content of RS is equal to $0000,
RD will be cleared and the carry flag will be set. This is used to distinguish a “1” in position 0 versus no
“1” in the whole RS register at all.
CCR Effects
Code and CPU Cycles
BFFO
Bit Field Find First One
BFFO
NZVC
0 ∆ 0 ∆
N: 0; cleared.
Z: Set if the result is $0000; cleared otherwise.
V: 0; cleared.
C: Set if RS = $0000
1
; cleared otherwise.
1
Before executing the instruction
Source Form
Address
Mode
Machine Code Cycles
BFFO RD, RS DYA 0 0 0 0 1 RD RS 1 0 0 0 0 P