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Chapter 1 Device Overview (MC9S12XDP512V2)
MC9S12XDP512 Data Sheet, Rev. 2.11
58 Freescale Semiconductor
0x0216 CAN3IDMR2
R
AM7 AM6 AM5 AM4 AM3 AM2 AM1 AM0
W
0x0217 CAN3IDMR3
R
AM7 AM6 AM5 AM4 AM3 AM2 AM1 AM0
W
0x0218 CAN3IDAR4
R
AC7 AC6 AC5 AC4 AC3 AC2 AC1 AC0
W
0x0219 CAN3IDAR5
R
AC7 AC6 AC5 AC4 AC3 AC2 AC1 AC0
W
0x021A CAN3IDAR6
R
AC7 AC6 AC5 AC4 AC3 AC2 AC1 AC0
W
0x021B CAN3IDAR7
R
AC7 AC6 AC5 AC4 AC3 AC2 AC1 AC0
W
0x021C CAN3IDMR4
R
AM7 AM6 AM5 AM4 AM3 AM2 AM1 AM0
W
0x021D CAN3IDMR5
R
AM7 AM6 AM5 AM4 AM3 AM2 AM1 AM0
W
0x021E CAN3IDMR6
R
AM7 AM6 AM5 AM4 AM3 AM2 AM1 AM0
W
0x021F CAN3IDMR7
R
AM7 AM6 AM5 AM4 AM3 AM2 AM1 AM0
W
0x0220–
0x022F
CAN3RXFG
R FOREGROUND RECEIVE BUFFER
(See Detailed MSCAN Foreground Receive and Transmit Buffer Layout)
W
0x0230–
0x023F
CAN3TXFG
R
FOREGROUND TRANSMIT BUFFER
(See Detailed MSCAN Foreground Receive and Transmit Buffer Layout)
W
0x0240–0x027F Port Integration Module PIM_9DX (PIM) Map (Sheet 1 of 4)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x0240 PTT
R
PTT7 PTT6 PTT5 PTT4 PTT3 PTT2 PTT1 PTT0
W
0x0241 PTIT
R PTIT7 PTIT6 PTIT5 PTIT4 PTIT3 PTIT2 PTIT1 PTIT0
W
0x0242 DDRT
R
DDRT7 DDRT7 DDRT5 DDRT4 DDRT3 DDRT2 DDRT1 DDRT0
W
0x0243 RDRT
R
RDRT7 RDRT6 RDRT5 RDRT4 RDRT3 RDRT2 RDRT1 RDRT0
W
0x0244 PERT
R
PERT7 PERT6 PERT5 PERT4 PERT3 PERT2 PERT1 PERT0
W
0x0245 PPST
R
PPST7 PPST6 PPST5 PPST4 PPST3 PPST2 PPST1 PPST0
W
0x0246 Reserved
R00000000
W
0x0247 Reserved
R00000000
W
0x0200–0x023F Freescale Scalable CAN — MSCAN (CAN3) (continued)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0