Chapter 5 Clocks and Reset Generator (S12CRGV6)
MC9S12XDP512 Data Sheet, Rev. 2.11
276 Freescale Semiconductor
5.3.2 Register Descriptions
This section describes in address order all the MC9S12XDP512 registers and their individual bits.
Register
Name
Bit 7 6 5 4 3 2 1 Bit 0
0x_00
SYNR
R0 0
SYN5 SYN4 SYN3 SYN2 SYN1 SYN0
W
0x_01
REFDV
R0 0
REFDV5 REFDV4 REFDV3 REFDV2 REFDV1 REFDV0
W
0x_02
CTFLG
R00000000
W
0x_03
CRGFLG
R
RTIF PORF LVRF LOCKIF
LOCK TRACK
SCMIF
SCM
W
0x_04
CRGINT
R
RTIE ILAF
0
LOCKIE
00
SCMIE
0
W
0x_05
CLKSEL
R
PLLSEL PSTP
00
PLLWAI
0
RTIWAI COPWAI
W
0x_06
PLLCTL
R
CME PLLON AUTO ACQ FSTWKP PRE PCE SCME
W
0x_07
RTICTL
R
RTDEC RTR6 RTR5 RTR4 RTR3 RTR2 RTR1 RTR0
W
0x_08
COPCTL
R
WCOP RSBCK
000
CR2 CR1 CR0
W WRTMASK
0x_09
FORBYP
R00000000
W
0x_0A
CTCTL
R10000000
W
0x_0B
ARMCOP
R00000000
W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
= Unimplemented or Reserved
Figure 5-3. S12CRGV6 Register Summary