Chapter 1 Device Overview (MC9S12XDP512V2)
MC9S12XDP512 Data Sheet, Rev. 2.11
Freescale Semiconductor 43
0x00BB SCI2CR2
R
TIE TCIE RIE ILIE TE RE RWU SBK
W
0x00BC SCI2SR1
R TDRE TC RDRF IDLE OR NF FE PF
W
0x00BD SCI2SR2
R
AMAP
00
TXPOL RXPOL BRK13 TXDIR
RAF
W
0x00BE SCI2DRH
RR8
T8
000000
W
0x00BF SCI2DRL
RR7R6R5R4R3R2R1R0
WT7T6T5T4T3T2T1T0
1
Those registers are accessible if the AMAP bit in the SCI2SR2 register is set to zero
2
Those registers are accessible if the AMAP bit in the SCI2SR2 register is set to one
0x00C0–0x00C7 Asynchronous Serial Interface (SCI3) Map
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x00C0 SCI3BDH
1
1
Those registers are accessible if the AMAP bit in the SCI3SR2 register is set to zero
R
IREN TNP1 TNP0 SBR12 SBR11 SBR10 SBR9 SBR8
W
0x00C1 SCI3BDL
1
R
SBR7 SBR6 SBR5 SBR4 SBR3 SBR2 SBR1 SBR0
W
0x00C2 SCI3CR1
1
R
LOOPS SCISWAI RSRC M WAKE ILT PE PT
W
0x00C0 SCI3ASR1
2
2
Those registers are accessible if the AMAP bit in the SCI3SR2 register is set to one
R
RXEDGIF
0000
BERRV BERRIF BKDIF
W
0x00C1 SCI3ACR1
2
R
RXEDGIE
00000
BERRIE BKDIE
W
0x00C2 SCI3ACR2
2
R00000
BERRM1 BERRM0 BKDFE
W
0x00C3 SCI3CR2
R
TIE TCIE RIE ILIE TE RE RWU SBK
W
0x00C4 SCI3SR1
R TDRE TC RDRF IDLE OR NF FE PF
W
0x00C5 SCI3SR2
R
AMAP
00
TXPOL RXPOL BRK13 TXDIR
RAF
W
0x00C6 SCI3DRH
RR8
T8
000000
W
0x00C7 SCI3DRL
RR7R6R5R4R3R2R1R0
WT7T6T5T4T3T2T1T0
0x00B8–0x00BF Asynchronous Serial Interface (SCI2) Map (continued)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0