Chapter 4 Port Integration Module (S12XDP512PIMV2)
MC9S12XDP512 Data Sheet, Rev. 2.11
Freescale Semiconductor 191
Register
Name
Bit 7 6 5 4 3 2 1 Bit 0
0x0000
PORTA
R
PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0
W
0x0001
PORTB
R
PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
W
0x0002
DDRA
R
DDRA7 DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1 DDRA0
W
0x0003
DDRB
R
DDRB7 DDRB6 DDRB5 DDRB4 DDRB3 DDRB2 DDRB1 DDRB0
W
0x0004
PORTC
R
PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
W
0x0005
PORTD
R
PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
W
0x0006
DDRC
R
DDRC7 DDRC6 DDRC5 DDRC4 DDRC3 DDRC2 DDRC1 DDRC0
W
0x0007
DDRD
R
DDRD7 DDRD6 DDRD5 DDRD4 DDRD3 DDRD2 DDRD1 DDRD0
W
0x0008
PORTE
R
PE7 PE6 PE5 PE4 PE3 PE2
PE1 PE0
W
0x0009
DDRE
R
DDRE7 DDRE6 DDRE5 DDRE4 DDRE3 DDRE2
00
W
0x000A
0x000B
Non-PIM
Address
Range
R
Non-PIM Address Range
W
0x000C
PUCR
R
PUPKE BKPUE
0
PUPEE PUPDE PUPCE PUPBE PUPAE
W
0x000D
RDRIV
R
RDPK
00
RDPE RDPD RDPC RDPB RDPA
W
= Unimplemented or Reserved
Figure 4-2. PIM Register Summary (Sheet 1 of 6)