Chapter 4 Port Integration Module (S12XDP512PIMV2)
MC9S12XDP512 Data Sheet, Rev. 2.11
192 Freescale Semiconductor
0x000E–
0x001B
Non-PIM
Address
Range
R
Non-PIM Address Range
W
0x001C
ECLKCTL
R
NECLK NCLKX2
0000
EDIV1 EDIV0
W
0x001D
Reserved
R00000000
W
0x001E
IRQCR
R
IRQE IRQEN
000000
W
0x001F
Reserved
R00000000
W
0x0020–
0x0031
Non-PIM
Address
Range
R
Non-PIM Address Range
W
0x0032
PORTK
R
PK7 PK6 PK5 PK4 PK3 PK2 PK1 PK0
W
0x0033
DDRK
R
DDRK7 DDRK6 DDRK5 DDRK4 DDRK3 DDRK2 DDRK1 DDRK0
W
0x0034–
9x023F
Non-PIM
Address
Range
R
Non-PIM Address Range
W
0x0240
PTT
R
PTT7 PTT6 PTT5 PTT4 PTT3 PTT2 PTT1 PTT0
W
0x0241
PTIT
R PTIT7 PTIT6 PTIT5 PTIT4 PTIT3 PTIT2 PTIT1 PTIT0
W
0x0242
DDRT
R
DDRT7 DDRT6 DDRT5 DDRT4 DDRT3 DDRT2 DDRT1 DDRT0
W
0x0243
RDRT
R
RDRT7 RDRT6 RDRT5 RDRT4 RDRT3 RDRT2 RDRT1 RDRT0
W
Register
Name
Bit 7 6 5 4 3 2 1 Bit 0
= Unimplemented or Reserved
Figure 4-2. PIM Register Summary (Sheet 2 of 6)