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Chapter 14 Freescale’s Scalable Controller Area Network (S12MSCANV3)
MC9S12XDP512 Data Sheet, Rev. 2.11
636 Freescale Semiconductor
14.3.2.12 MSCAN Identifier Acceptance Control Register (CANIDAC)
The CANIDAC register is used for identifier acceptance control as described below.
Read: Anytime
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1), except bits IDHITx, which are
read-only
Module Base + 0x000B
76543210
R0 0
IDAM1 IDAM0
0 IDHIT2 IDHIT1 IDHIT0
W
Reset: 00000000
= Unimplemented
Figure 14-14. MSCAN Identifier Acceptance Control Register (CANIDAC)
Table 14-17. CANIDAC Register Field Descriptions
Field Description
5:4
IDAM[1:0]
Identifier Acceptance Mode — The CPU sets these flags to define the identifier acceptance filter organization
(see Section 14.4.3, “Identifier Acceptance Filter”). Table 14-18 summarizes the different settings. In filter closed
mode, no message is accepted such that the foreground buffer is never reloaded.
2:0
IDHIT[2:0]
Identifier Acceptance Hit Indicator — The MSCAN sets these flags to indicate an identifier acceptance hit (see
Section 14.4.3, “Identifier Acceptance Filter”). Table 14-19 summarizes the different settings.
Table 14-18. Identifier Acceptance Mode Settings
IDAM1 IDAM0 Identifier Acceptance Mode
0 0 Two 32-bit acceptance filters
0 1 Four 16-bit acceptance filters
1 0 Eight 8-bit acceptance filters
1 1 Filter closed
Table 14-19. Identifier Acceptance Hit Indication
IDHIT2 IDHIT1 IDHIT0 Identifier Acceptance Hit
0 0 0 Filter 0 hit
0 0 1 Filter 1 hit
0 1 0 Filter 2 hit
0 1 1 Filter 3 hit
1 0 0 Filter 4 hit
1 0 1 Filter 5 hit
1 1 0 Filter 6 hit
1 1 1 Filter 7 hit