Freescale Semiconductor MC9S12XDP512 Microscope & Magnifier User Manual


 
Chapter 5 Clocks and Reset Generator (S12CRGV6)
MC9S12XDP512 Data Sheet, Rev. 2.11
Freescale Semiconductor 281
5.3.2.6 CRG Clock Select Register (CLKSEL)
This register controls CRG clock selection. Refer to Figure 5-17 for more details on the effect of each bit.
Read: Anytime
Write: Refer to each bit for individual write conditions
Module Base +0x_05
76543210
R
PLLSEL PSTP
00
PLLWAI
0
RTIWAI COPWAI
W
Reset 00000000
= Unimplemented or Reserved
Figure 5-9. CRG Clock Select Register (CLKSEL)
Table 5-4. CLKSEL Field Descriptions
Field Description
7
PLLSEL
PLL Select Bit — Write anytime. Writing a1 when LOCK = 0 and AUTO = 1, or TRACK = 0 and AUTO = 0 has
no effect This prevents the selection of an unstable PLLCLK as SYSCLK. PLLSEL bit is cleared when the MCU
enters self clock mode, Stop mode or wait mode with PLLWAI bit set.
0 System clocks are derived from OSCCLK (Bus Clock = OSCCLK / 2).
1 System clocks are derived from PLLCLK (Bus Clock = PLLCLK / 2).
6
PSTP
Pseudo Stop Bit
Write: Anytime
This bit controls the functionality of the oscillator during stop mode.
0 Oscillator is disabled in stop mode.
1 Oscillator continues to run in stop mode (pseudo stop).
Note: Pseudo stop mode allows for faster STOP recovery and reduces the mechanical stress and aging of the
resonator in case of frequent STOP conditions at the expense of a slightly increased power consumption.
3
PLLWAI
PLL Stops in Wait Mode Bit
Write: Anytime
If PLLWAI is set, the MC9S12XDP512 will clear the PLLSEL bit before entering wait mode. The PLLON bit
remains set during wait mode, but the PLL is powered down. Upon exiting wait mode, the PLLSEL bit has to be
set manually if PLL clock is required.
While the PLLWAI bit is set, the AUTO bit is set to 1 in order to allow the PLL to automatically lock on the selected
target frequency after exiting wait mode.
0 PLL keeps running in wait mode.
1 PLL stops in wait mode.
1
RTIWAI
RTI Stops in Wait Mode Bit
Write: Anytime
0 RTI keeps running in wait mode.
1 RTI stops and initializes the RTI dividers whenever the part goes into wait mode.
0
COPWAI
COP Stops in Wait Mode Bit
Normal modes: Write once
Special modes: Write anytime
0 COP keeps running in wait mode.
1 COP stops and initializes the COP counter whenever the part goes into wait mode.