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Chapter 18 Periodic Interrupt Timer (S12PIT24B4CV1)
MC9S12XDP512 Data Sheet, Rev. 2.11
Freescale Semiconductor 757
18.3.2.6 PIT Time-Out Flag Register (PITTF)
Read: Anytime
Write: Anytime (write to clear); writes to the reserved bits have no effect
18.3.2.7 PIT Micro Timer Load Register 0 to 1 (PITMTLD0–1)
Read: Anytime
Write: Anytime
Module Base + 0x0005
76543210
R0000
PTF3 PTF2 PTF1 PTF0
W
Reset 00000000
= Unimplemented or Reserved
Figure 18-8. PIT Time-Out Flag Register (PITTF)
Table 18-7. PITTF Field Descriptions
Field Description
3:0
PTF[3:0]
PIT Time-out Flag Bits for Timer Channel 3:0 — PTF is set when the corresponding 16-bit timer modulus
down-counter and the selected 8-bit micro timer modulus down-counter have counted to zero. The flag can be
cleared by writing a one to the flag bit. Writing a zero has no effect. If flag clearing by writing a one and flag setting
happen in the same bus clock cycle, the flag remains set. The flag bits are cleared if the PIT module is disabled
or if the corresponding timer channel is disabled.
0 Time-out of the corresponding PIT channel has not yet occurred.
1 Time-out of the corresponding PIT channel has occurred.
Module Base + 0x0006
76543210
R
PMTLD7 PMTLD6 PMTLD5 PMTLD4 PMTLD3 PMTLD2 PMTLD1 PMTLD0
W
Reset 00000000
Figure 18-9. PIT Micro Timer Load Register 0 (PITMTLD0)
Module Base + 0x0007
76543210
R
PMTLD7 PMTLD6 PMTLD5 PMTLD4 PMTLD3 PMTLD2 PMTLD1 PMTLD0
W
Reset 00000000
Figure 18-10. PIT Micro Timer Load Register 1 (PITMTLD1)