Chapter 1 Device Overview (MC9S12XDP512V2)
MC9S12XDP512 Data Sheet, Rev. 2.11
50 Freescale Semiconductor
0x00130–0x0137 Asynchronous Serial Interface (SCI4) Map
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x0130 SCI4BDH
1
1
Those registers are accessible if the AMAP bit in the SCI4SR2 register is set to zero
R
IREN TNP1 TNP0 SBR12 SBR11 SBR10 SBR9 SBR8
W
0x0131 SCI4BDL
1
R
SBR7 SBR6 SBR5 SBR4 SBR3 SBR2 SBR1 SBR0
W
0x0132 SCI4CR1
1
R
LOOPS SCISWAI RSRC M WAKE ILT PE PT
W
0x0130 SCI4ASR1
2
2
Those registers are accessible if the AMAP bit in the SCI4SR2 register is set to one
R
RXEDGIF
0000
BERRV BERRIF BKDIF
W
0x0131 SCI4ACR1
2
R
RXEDGIE
00000
BERRIE BKDIE
W
0x0132 SCI4ACR2
2
R00000
BERRM1 BERRM0 BKDFE
W
0x0133 SCI4CR2
R
TIE TCIE RIE ILIE TE RE RWU SBK
W
0x0134 SCI4SR1
R TDRE TC RDRF IDLE OR NF FE PF
W
0x0135 SCI4SR2
R
AMAP
00
TXPOL RXPOL BRK13 TXDIR
RAF
W
0x0136 SCI4DRH
RR8
T8
000000
W
0x0137 SCI4DRL
RR7R6R5R4R3R2R1R0
WT7T6T5T4T3T2T1T0
0x0138–0x013F Asynchronous Serial Interface (SCI5) Map
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x0138 SCI5BDH
1
R
IREN TNP1 TNP0 SBR12 SBR11 SBR10 SBR9 SBR8
W
0x0139 SCI5BDL
1
R
SBR7 SBR6 SBR5 SBR4 SBR3 SBR2 SBR1 SBR0
W
0x013A SCI5CR1
1
R
LOOPS SCISWAI RSRC M WAKE ILT PE PT
W
0x0138 SCI5ASR1
2
R
RXEDGIF
0000
BERRV BERRIF BKDIF
W
0x0139 SCI5ACR1
2
R
RXEDGIE
00000
BERRIE BKDIE
W
0x013A SCI5ACR2
2
R00000
BERRM1 BERRM0 BKDFE
W
0x013B SCI5CR2
R
TIE TCIE RIE ILIE TE RE RWU SBK
W
0x013C SCI5SR1
R TDRE TC RDRF IDLE OR NF FE PF
W