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Chapter 4 Port Integration Module (S12XDP512PIMV2)
MC9S12XDP512 Data Sheet, Rev. 2.11
Freescale Semiconductor 189
0x0264 Port H Pull Device Enable Register (PERH) Read / Write
0x0265 Port H Polarity Select Register (PPSH) Read / Write
0x0266 Port H Interrupt Enable Register (PIEH) Read / Write
0x0267 Port H Interrupt Flag Register (PIFH) Read / Write
0x0268 Port J Data Register (PTJ) Read / Write
1
0x0269 Port J Input Register (PTIJ) Read
0x026A Port J Data Direction Register (DDRJ) Read / Write
1
0x026B Port J Reduced Drive Register (RDRJ) Read / Write
1
0x026C Port J Pull Device Enable Register (PERJ) Read / Write
1
0x026D Port J Polarity Select Register (PPSJ) Read / Write
1
0x026E Port J Interrupt Enable Register (PIEJ) Read / Write
1
0x026F Port J Interrupt Flag Register (PIFJ) Read / Write
1
0x0270 Reserved —
0x0271 Port AD0 Data Register 1 (PT1AD0) Read / Write
0x0272 Reserved —
0x0273 Port AD0 Data Direction Register 1 (DDR1AD0) Read / Write
0x0274 Reserved —
0x0275 Port AD0 Reduced Drive Register 1 (RDR1AD0) Read / Write
0x0276 Reserved —
0x0277 Port AD0 Pull Up Enable Register 1 (PER1AD0) Read / Write
0x0278 Port AD1 Data Register 0 (PT0AD1) Read / Write
0x0279 Port AD1 Data Register 1 (PT1AD1) Read / Write
0x027A Port AD1 Data Direction Register 0 (DDR0AD1) Read / Write
0x027B Port AD1 Data Direction Register 1 (DDR1AD1) Read / Write
0x027C Port AD1 Reduced Drive Register 0 (RDR0AD1) Read / Write
0x027D Port AD1 Reduced Drive Register 1 (RDR1AD1) Read / Write
0x027E Port AD1 Pull Up Enable Register 0 (PER0AD1) Read / Write
0x027F Port AD1 Pull Up Enable Register 1 (PER1AD1) Read / Write
1
Write access not applicable for one or more register bits. Refer to Section 4.3.2, “Register
Descriptions”.
Table 4-2. PIM Memory Map (Sheet 3 of 3)
Address Use Access