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Chapter 4 Port Integration Module (S12XDP512PIMV2)
MC9S12XDP512 Data Sheet, Rev. 2.11
216 Freescale Semiconductor
4.3.2.22 Port T Polarity Select Register (PPST)
Read: Anytime.
Write: Anytime.
This register selects whether a pull-down or a pull-up device is connected to the pin.
4.3.2.23 Port S Data Register (PTS)
Read: Anytime.
Write: Anytime.
Port S pins 7–4 are associated with the SPI0. The SPI0 pin configuration is determined by several status
bits in the SPI0 module. Refer to SPI section for details. When not used with the SPI0, these pins can be
used as general purpose I/O.
Port S bits 3–0 are associated with the SCI1 and SCI0. The SCI ports associated with transmit pins 3 and
1 are configured as outputs if the transmitter is enabled. The SCI ports associated with receive pins 2 and
0 are configured as inputs if the receiver is enabled. Refer to SCI section for details. When not used with
the SCI, these pins can be used as general purpose I/O.
0x0245
76543210
R
PPST7 PPST6 PPST5 PPST4 PPST3 PPST2 PPST1 PPST0
W
Reset 00000000
Figure 4-24. Port T Polarity Select Register (PPST)
Table 4-26. PPST Field Descriptions
Field Description
7–0
PPST[7:0]
Pull Select Port T
0 A pull-up device is connected to the associated port T pin, if enabled by the associated bit in register PERT
and if the port is used as input.
1 A pull-down device is connected to the associated port T pin, if enabled by the associated bit in register PERT
and if the port is used as input.
0x0248
76543210
R
PTS7 PTS6 PTS5 PTS4 PTS3 PTS2 PTS1 PTS0
W
SCI/SPI SS0 SCK0 MOSI0 MISO0 TXD1 RXD1 TXD0 RXD0
Reset 00000000
Figure 4-25. Port S Data Register (PTS)