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EXPANDED MCS-48 SYSTEM
another using standar.d MCS-80/85
I/O
devices; and a
third
"using
the
combination
memory/I/O
expander devices the 8155,
8355, and 8755. It is also possible
to
expand
using standard
TTL
devices
as
shown in
Chapter
5.
3.3.1
I/O Expander Device
The most efficient means of
I/O expansion for
small systems is the 8243 I/O Expander De-
vice
which requires only 4 port lines (lower
half
of Port
2)
for communication with the
8048. The 8243 contains four 4-bit
I/O ports
which serve
as
extension of· the on chip I/O
and are addressed as ports #4-7. The follow-
ing operations may be performed on these
ports:
1.
Transfer Accumulator to Port.
2.
Transfer Port to Accumulator.
3.
AND Accumulator to Port.
4.
OR Accumulator to Port.
A 4-bit transfer from a port to the
lower half of
the Accumulator sets the most significant four
bits to
zero. All communication between the
8048 and the 8243 occurs over Port 2
lower
(P20-P23)
withtimiilg
provided by an output
pulse
on the
PROG.
pin of the
processor~
Each
transfer
consists of two 4-bit nibbles:
The first containing the "op code" and port
address and the second containing the
actual
4 bits of data.
Nibble 1
Nibble 2
3 2 1 0 3 2 1 0
II
I A I A I
Id
Id
Id
Id
I
Instruction
Port
data
Code Address
II
AA
00 Read
OO-Port
#4
01
Write
01-Port
#5
10
OR
10-Port
#6
11
AND
11-Port
#7
EXPANDER INTERFACE
PROG
P20·P23
fl
CHIP SELECT CONNECTIO
-=-
THAN
ONE
EXPANDER
IS
N IF MORE
USED
A-
~
CS
('
20 > I/O
..
"
...
P4
4
I/O
PROG PROG
"
v
A
2
] TEST
P5
4
8048
"
INPUTS
8243
v
I/O
..
A
P6 4
I/O
P20-P23
4
DATA
IN
v
"
v
P2
"
P7
4
I/O
v
OUTPUT EXPANDER TIMING
\
___
-----..11
~
___
~X
_____
~)~·~-
BITSD.l
DO}
01
PORT
10
ADDRESS
11
ADDRESS (4-BITS)
DATA
(4-BITS)
ANDOPCODE
3·6
BITS 2.3
DO}
READ
01
WRITE
10 OR
11
AND