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8255A/8255A·5
PROGRAMMABLE PERIPHERAL INTERFACE
• MCS.85 ™ Compatible 8255A·5
•
24
Programmable 1/0 Pins
• Completely TTL Compatible
• Fully Compatible
with
Intel® Micro·
processor Families
• Improved Timing Characteristics
• Direct Bit SetlReset Capability Easing
Control Application Interface
• 40·Pin Dual In·Line
Package
• Reduces System Package Count
• Improved
DC
Driving Capability
The
Intel@
8255A
is
a general purpose programmable I/O device designed for use
with
Intel@
microprocessors. It has
24110 pins which may be individually programmed in 2 groups
of
12
and used in 3 major modes
of
operation.
In
the
first
mode (MODE
0),
each group
of
12
1/0 pins may
be
programmed in sets
of
4
to
be
input
or
output. In MODE
1,
the second
mode, each group may be programmed
to
have 8 lines
of
input
or
output. Of the remaining 4 pins, 3 are used for hand-
shaking and
interrupt
control
signals. The third mode
of
operation (MODE
2)
is a bidirectional bus mode which uses 8
lines for a bidirectional bus, and 5 lines, borrowing one from the other group, for handshaking.
PIN
CONFIGURATION
8255A
BLOCK
DIAGRAM
S~~;l~;S
{--
m
-_GND
10
PA,-PAO
PIN
NAMES
0,-°
0
OAT A BUS (BI·DIRECTIONAl)
RESET RESET INPUT
CHIP
SELECT
READ
INPUT
WR
WAITE
INPUT
AD,A,
PORT AODRESS
PA7·PM
PORT
A
IBITI
ps,._
PORTB
IBITI
~,-'CO
PORT C
(BIT)
Vee
<Ii
VOLTS
GND
'VOLTS
9-17
AFN-00744A-01