inter
8755A
16,384-BIT EPROM WITH 1/0
• Directly Compatible with
SOS5A
CPU
• 2048 Words
)(
8 Bits • 2 General Purpose 8·Bit
1/0
Ports
• Single +
5V
Power Supply
(V
cd
• U.V. Erasable and Electrically
Reprogrammable
• Internal Address Latch
• Each
1/0
Port Line Individually
Programmable as Input or Output
• Multiplexed Address and Data Bus
• 40·Pin
DIP
The
Intel@
8755A is
an
erasable and electrically reprogram mabie ROM (EPROM I and
liD
chip
to
be used in the
MCS-85'·
microcomputer
system. The EPROM
portion
is organized
as
2048 words
l:>y
8 bits. It has a maximum access time
of
450 ns
to
permit
use with no wait states in
an
8085A CPU.
The
1/0
portion
consists
of
2 general
purpose
1/0
ports. Each
1/0
port has 8 port lines, and each
1/0
port line is individu-
ally
programmable as
input
or
output.
PIN CONFIGURATION
BLOCK
DIAGRAM
vee
ClK
ClK
RESET
READY
Voo
PB.
READY
A"o_,
101M
G
i5R
As-lO
PB,
lOW
CE,
2K)(
8
ALE
101M
EPROM
~
AD,
PAs
ALE
AD,
PA.
RD
AD,
lOW
AD,
PA,
RESET
AD.
iDA
ADs
PA,
~VCCI+5V1
AD.
AlO
PROG/CE,
AD,
A.
Voo
Vss
(OV)
Vss
INTEL
CORPORATION
ASstJMES
NO
RESPONSIBIlITY
FOR
THE
USE
OF
ANY
CIRCUITRY
OTHER
THAN
CIRCUITRY
EMBOOIEO
IN
AN
INTEL
PROOUCT.
NO
OTHER
CIftCUIT
PRlENT
LICENSES
ARE
IMPLIED.
©
INTEl
CORPORATION.
1979
6-74
PA
O
-
7
PB
O
-
7