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APPLICATION EXAMPLES
21
A8
22
A9
23
Al0
12
ADO
13
AD1
14
AD2
15
AD3
16
AD4
17
AD5
18
AD6
19
AD7
8
lOR
~
lOW
9
OPTIONAL GATE
RD
TO
PREVENT
,--2l.
"HOLE"
IN
~
ALE
+5V GND
PROGRAM
MEMORY
-1..)
2
tl26
L
CE
---!
RESET
Vee VOD
Vss
~
2
Pl0
l·
XTAL
1
P11
~
P12
~
3
P13
~
XTAL2
P14
rll-
P15
f#-
4
P16
rE-
RESET
P17
~
NC
7
P20
~
EA
P21
~
P22
23
8049
24
5
8048
P23
-
Sri
P24
~
}
110
8748
P25
~
P26
~
P27
f1L
1
DBO
12
12
ADO
--
TO
39
DBl
13
13
ADl
--
T1
DB214
14 AD2
6
DB3 15 15
AD3
--
INT
DB4
16
16 AD4
DB5
17
17 AD5
DB6
18
18 AD6
DB7
19
19 AD7
ALE
PSEN
PROG
WR
AD
1
25
10
18
7
101M
11
9
9
AD
10
_
WR
~
ALE
8
CE
~
RESET
CAN
BE
SUPPLI
ED
BY SYSTEM
RESET
OR
PORT LINE OF 8048
+5V +5V
GND GND
140
15
bo
11
Vee
VOD
Vss
CE
8355
8755A
2Kx
8
ROM
JX
J:
T
40
Gr
20
Vee
Vss
8156
256
X 8
TIMER
OUT
l6
RAM
TIMER
i
TIMER
IN
t
3
• This configuration
is
explained
in
section 3.4
THE THREE
CHIP
SYSTEM
5-10
g...
PAO
PAl
~
PA2
~
PA3
~
PA4
~
PA5
~
PA6
~
PA7
F-'-
PBO
~
PBl
~
PB2
~
PB3
~
PB4
~
PB5
~
PB6
~
PB7
F-
1/0
PAO
#-
PAl
~
PA2
~
PA3
~
PA4
~
PA5
~
PA6
~
PA7
~
PCO
~
PCl
~
PC2
~
PC3
~
~
PC4
PC5
~
1/0
PBO
~
PBl
S-
PB2
~
PB3
~
PB4
IJ4
PB5
tJt-
PB6
~
PB7
F-