Intel mcs-48 Microscope & Magnifier User Manual


 
inter
8031/8051/8751
TABLE
2-1
8051
INSTRUCTION SET SUMMARY
Notes
on
instruction
set
and
addressing modes:
Rn
- Register
R7-RO
of
the currently selected Register Bank.
data
-8-oit
internal data location's address. This could be an
@Ri
Internal Data Ram location (0-127)
or
a
SFR
(i.e.
I/O
port, control register, status register, etc. (128-255).
-8-bil
Internal Data RAM location (!f-255) addressed in-
directly through register
Rl
or
RO.
-8-bit
constant
included
in
instruction.
-1~bit
constant included
in
instruction.
#data
#datal6
addr16
-16-bit
destinatien address. Used by LCALL & LJMP. A
branch can be anywhere within the 64K-byte Program
Memory
address
space.
addrll
rei
bit
-II-bit
destination address. Used by ACALL &AJMP. The
branch
will
be
within the same 2K-byte page of program
memory
as
the first byte
of
the
following
instruction.
-Signed
(two's complement) 8-bit offset byte. Used by
SJMP and all conditional jumps. Range is -128 to +127
bytes
relative to first byte of the following Instruction.
-Direct
Addressed bit in Internal Data RAM
or
Special
Function Register.
- New operation
not
provided by 8048/8049.
Data
Transfer
Oscillalor
Mnemonic
Description
Bytes Periods
MOV
A,Rn
Move
register
to
A
1
12
'MOV
A,data Move direct byte
to
A
12
MOV A,@Ri
Move indirect RAM to A
12
MOV A,#data
Move immediate data to A
12
MOV Rn,A Move A to register
12
'MOV
Rn,dala
Move
direct byte
to
register
24
MOV Rn,#data Move immediate data to
12
register
'MOV
data,A
Move A to direct byte
12
'MOV
data,Rn Move register to direct byte
24
'MOV
data,data
M6ve
direct byte to direct
24
byte
'MOV
data,@Ri
Move indirect RAM
to
direct
24
byte
'MOV
data,#data
Move immediate data to
24
direct byte
MOV@Ri,A
Move A to indirect RAM
12
'MOV
@Ri.data
Move direct byte to indirect
24
RAM
MOV @Ri,#data
Move
immediate data
to
12
indirect
RAM
'MOV
DPTR, Move 16-bit constant
to
Data
24
#datal6
Pointer
'MOV
C,bit Move direct bit
to
carry
12
'MOV
bit,C Move carry
to
di
rect bit
24
'MOVC
A,@A+
Move Program
Memory
byte
24
DPTR
addressed
by
A+DPTR to A
'MOVC
A,@A+PC
Move
Program
Memory
byte
24
addressed
by
A+PC
to A
MOVX A,@Ri Move External Data (8-bil
24
address) to A
'MOVX
A,@DPTR
Move
External Data (16-bit
24
address) to A
MOVX @Ri,A
Move A
to
External Data
24
(8-bit address)
'MOVX
@DPTR,A
Move
A
to
External Data
24
(16-bit address)
'PUSH
data
Move
direct byte
to
stack
24
and inc.
SP
'POP
data
Move
direct byte
from
stack
24
and dec.
SP
XCH A,Rn
Exchange register with A
12
'XCH
Adata
Exchange direct
byte
with
A
12
XCH A,@Ri
Exchange indirect
RAM
12
with A
XCHD A,@Ri
Exchange indirect
RAM's
12
least sig nibble with
A's
LSN
7-14
Interrupt
Response
Timf3:
To
finish
execution of current instruction,
respond
to
the interrupt request,
push
the
PC
and
to
vector
to
the
first
instruction
of
the
interrupt
service
program
requires
38
to
81
oscillator
periods (3
to
7
ps
@12MHz).
INSTRUCTIONS THAT AFFECT FLAG SETTINGS'
INSTRUCTION
FLAG INSTRUCTION FLAG
C
OV
AC C OV AC
ADD
X X X
CLR C 0
AD DC
X X
X
CPL C
X
SUBB X X X ANL
C,
bit X
MUL
0
X ANL C,Ibit X
DIV 0 X
ORL
C,
bit
X
DA X
ORL C,Ibit
X
RRC
X MOV
C,
bit X
RLC X CJNE X
SETB C 1
'Note that operations on
SFR
byte address 208
or
bit addresses 209-
215
(I.e.
the PSW
or
bits in the
PSW)
will also affect flag settings.
Logic
Oscillator
Mnemonic
Description Bytes Periods
ANL A,Rn AND register
10
A 1
12
'ANL
A.data
AND
direcl byte to A
12
ANL A,@Ri AND indirect RAM to A
12
ANL A,#dala
AND
immediate data to A
12
'ANL
data,A AND A to direct byte
12
'ANL
data,#data
AND
immediate data to direct
24
byte
'ANL
G,bit
AND
direct bit to carry
24
'ANL
C,Ibit AND complement
of
direct
bit
24
to carry
ORL A,Rn
OR
reg
ister
to
A
12
'ORL
A,data
OR
direct byte to A
12
ORL A,@Ri
OR
indirect RAM to A
12
ORL A,#data
OR immediate data
to
A
12
'ORL
dataA
OR
A to direct byte
12
'ORL
data,#data OR immediate data
to
direct
24
byte
'ORL
C,bit OR direct bit to carry
24
'ORL
C,Ibit
OR
complement of direct
bit
24
to
carry
XRL
A,Rn Exclusive-OR register
to
A
12
'XRL
A,data
Exclusive-OR direct byte
to
A
12
XRL
A,@Ri Exclusive-OR indirect RAM
12
to A
XRL
A,#data Exclusive-OR immediate
12
data to A
'XRL
data,A Exclusive-OR A to direct byte
12
,
XRL
data,#data
Exclusive-OR immediate
24
data
to
direct byte
'SETB C
Set
carry
12
'SETS
bit
Set direct bit
12
CLR A Clear A
12
CLR C Clear carry
12
'GLR
bit
Clear
direct bit
12
CPL A
Complement A
12
CPL C
Complement
carry
12
'CPL
bit
Complement
direct bit
12
RL
A Rotate A Left
·1
12
RLC A
Rotate A Left through carry
12
RR
A Rotate A Right
12
RRC
A
Rotate A Right through carry
12
SWAP
A
Rotate A left four (exchange
12
nibbles wi.thin
A)
All mnemonics copyrlghled@ Intel Corporation 1980.
AFN-01462A-14