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8259A
LTIM
liT
.=EOGE
1 "",LEVEL
TO
OTHER 'AIORTY
CULS
REOUEST
LATCH
itT
·""ORITY
REIOLVER
CONTRDL
LOGIC
,R
-+-11>>----'1..
o
a~~-+---,~uo.~-+~--4~
NON·
MASKED
REO
LATCH
c a o
oH-++-+
.:~
I I I
'1:1
Ii
NOTES
1.
MAlTER
CLEAR
ACTIVE
ONLY
DURING
rcw,
2.
FIIEEZE/II
ACTIVE
DURING
iJiITJ
AND
POLL
SEQUENCES
ONLY
3.
TRUTH
TAiLE
FOR
D·LATCH
Priority Cell - Simplified Logic Diagram
LEVEL
TRIGGERED
MODE
This mode is programmed using bit 3 in ICW1.
If LTIM
='1',
an
interrupt request wilrbe recognized by a
'high'
level on IA Input, and there is no need
for
an
edge
detection.
The
interrupt request must
be
removed
before the
EOI
command Is Issued or the
CPU
Interrupt
is enabled to prevent a second interrupt from occurring.
The
above figure shows a
conce~::Jal
circuit to give the
reader an understanding of the
level sensitive and edge
sensitive input circuitry
of
the 8259A.
Be
sure to note
that the request latch is a transparent D type latch.
READING
THE
8258A
STATUS
The Input status
of
several internal registers can be read
to update the user Information on the system. The
following registers can
be
read
by Issuing a suitable
OCW3
and
reading with
AD.
Interrupt Mask Register: 8-blt register whose content
specifies the Interrupt request
lines being masked.
acknowledged. The highest request
leyel is reset from
the
IAA when an Interrupt Is acknowledged. (Not
affected by IMA.)
OPEPIATION
fOLLOW
HOLD
In-Service Register
(ISR):
8-bit register which contains
the priority
levels that
are
being serviced.
The
.ISA is
updated when
an
End
of
Interrupt command is Issued.
Interrupt Mask Register: 8-bit register which. contains
the interrupt request
lines which are masked.
The IAA can
be
read when, prior to the
AD
pulse, a
WR
pulse is Issued with
OCW3
(EAIS=
1,
RIS=O.)
The ISA can
be
read
in a similar mode when EAIS=
1,
AIS
= 1 in the
OCW3.
There is no need to write
an
OCW3
before every status
read operation, as
long
as
the status read corresponds
with the previous one;
I.e.,
the
8259A
"remembers"
whether the
IRA or ISA has
been
previously selected by
the
OCW3.
This
is
not true when poll
is
used.
After
Initialization the
8259A
is set to IAA.
For reading the IMA, no
OCW3
is needed. The output
data bus
will contain the IMA whenever
AD
is
actiYe and
AO=
1.
Polling overrides status
read
when
P=
1,
EAIS= 1 in
OCW3.
9-50