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Symbol I/O Pin No. Function
EOI'
I/O
3
I/O
15
End
or Identify; processor
GPIB bus control line; used by
a
talker
to
indicate the end of
a
multiple byte transfer se·
quence. This pin is TTL com·
patible.
End
or Identify; IEEE GPIB bus
control line; used by a talker
to
indicate the end
of
a multi·
pie byte transfer sequence or,
by a
controller in conjunction
with ATN,
to
execute a polling
sequence.
Whel1
an
output,
this pin can sink
48
mA cur·
rent. When an input,
it
is a TTL
compatible Schmitt·trigger.
MOoE3
OPTA
OPTB
oAV
I--Y>-4-+-I
T/l!1
1--i>O-+-{>O~...J
DID,
1-----+-1
010,1-----+-1
010,
1-----+-1
010,
1-----+-1
010,1-----+1
010.1-----+-1
010,1-----+1
ATN
Figure
6.
Talker/Listener/Controller Data
Configuration
8293
MODE 3 PIN DESCRIPTION
Symbol
I/O
Pin No. Function
T/R1
Transmit receive
1;
controls
the direction for DAV and the
010 lines.
If
T/R1
is high, then
all these lines are sending
information to the
IEEE
GPIB
lines.
This input is TTL com·
patible.
EOI
3
End
of
Sequence and Atten·
ATN
4 tion; processor GPIB control
lines.
These two control lines
are ANDed together
to
deter·
mine whether all the tran·
sceivers in the
8293
are push·
pull
or open·collector. When
both
signals are low (true),
then the
controller is perform-
ing
a paiallei
poli
and
the
transceivers are all open-
collector.
These inputs are
TTL
compatible.
DAV'
0101'-
0108'
9-114
23
2
I/O
24
I/O
21
I/O
25,23,
10,9,
8,7,
6,
5
I/O
22,19,
18,17,
16,15,
13,12
Attention
Out;
processor
GPIB control line; used
by
the
8292 during
"take control syn-
chronously"
operations. This
pin is TTL
compatible.
Interface Clean
Latched; used
to make DAV received after the
system
controller asserts IFC.
This input is TTL compatible.
Data Valid; processor GPIB
handshake control line; used
to
indicate
the
condition
(availability and validity)
of
in-
formation
on
the 010 signals.
This pin is TTL compatible.
Data Valid;
IEEE
GPIB hand-
shake control line. When
an
input, this pin is a TTL com-
patible
Schmitt-trigger. When
DAV'
is
an
output,
it
can sink
48
mA.
Data
Input/Output; processor
GPIB bus data lines; used
to
carry message and data bytes
in a
bit-parallel byte-serial
form controlled by the three
handshake
signals. These
lines are
TTL
compatible.
Data Input/Output;
IEEE
GPIB
bus data lines. They are TTL
compatible Schmitt-triggers
when
used for input and can
sink
48
mA when used
for
out-
put.