Filter
Top Products
8255A18255A·5
Output Control Signal Definition
OBF (Output Buffer Full
F/F).
The OBF output will go
"low"
to
Indicate that the
CPU
has written data out
to
the specified port. The OBF F/F will
be
set by the rising
edge
of
the
WR
Input and reset by ACK Input being low.
ACK (Acknowledge Input). A
"low"
on this Input informs
the
8255A
that the data from port A or port B has been ac·
cepted.
In essence, a response from the peripheral
device indicating that it has received the data output by
the
CPU.
INTR (Interrupt Reque,t). A
"high"
on
this output can
be
used
to
interrupt the
CPU
when
an
output device has
ac-
cepted data transmitted by the
CPU.
INTR is set when
ACK is a
"one", OBF
IS
a
"one"
and INTE is a "one". It is
reset by the
falling edge of
WR.
INTR
OUTPUT
INTEA
Controlled by bit set/reset
of
PC6.
INTE B
Controlled by bit set/reset of PC2.
Figure
9.
Mode 1 (Strobed Output)
CONTROL
WORD
D7
D.
Os
04 03
02
0,
Do
/.
10
I.
1
°1·IOMXlXl
L~
O-OUTPUT
WR-
CONTROL
WORD
Figure
8.
MODE
1 Output
r
...t----tAK
MODE. (PORT
AI
r--
,
I INTE I
I A I
__
J
PA,.p.... 8
MODE
1 (PORT
BI
PB1.P~~
PC,
ODs
INTRa
AFN.Q0744A-'O