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8XC196NP, 80C196NU USER’S MANUAL
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4.6 SOFTWARE PROTECTION FEATURES AND GUIDELINES
The device has several features to assist in recovering from hardware and software errors. The
unimplemented opcode interrupt provides protection from executing unimplemented opcodes.
The hardware reset instruction (RST) can cause a reset if the program counter goes out of bounds.
The RST instruction opcode is FFH, so the processor will reset itself if it tries to fetch an instruc-
tion from unprogrammed locations in nonvolatile memory or from bus lines that have been pulled
high.
We recommend that you fill unused areas of code with NOPs and periodic jumps to an error rou-
tine or RST instruction. This is particularly important in the code surrounding lookup tables, since
accidentally executing from lookup tables will cause undesired results. Wherever space allows,
surround each table with seven NOPs (because the longest device instruction has seven bytes) and
a RST or a jump to an error routine. Since RST is a one-byte instruction, the NOPs are unneces-
sary if RSTs are used instead of jumps to an error routine. This will help to ensure a speedy re-
covery from a software error.