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Glossary-4
8XC196NP, 80C196NU USER’S MANUAL
ISR See interrupt service routine.
LONG-INTEGER A 32-bit, signed variable with values from –2
31
through +2
31
–1.
LSB Least-significant bit of a byte or least-significant byte
of a word.
MAC See multiply-accumulate.
maskable interrupts All interrupts except unimplemented opcode,
software trap, and NMI. Maskable interrupts can be
disabled (masked) by the individual mask bits in the
interrupt mask registers, and their servicing can be
disabled by the global interrupt enable bit. Each
maskable interrupt can be assigned to the PTS for
processing.
MSB Most-significant bit of a byte or most-significant byte
of a word.
multiplexed bus The configuration in which the device uses both
A19:0 and AD15:0 for address and also uses AD15:0
for data. See also demultiplexed bus.
multiply-accumulate An operation performed by the 8XC196NU’s
enhanced multiplication instructions. The result of the
operation is stored in a dedicated, 32-bit accumulator.
n-channel FET A field-effect transistor with an n-type conducting
path (channel).
n-type material Semiconductor material with introduced impurities
(doping) causing it to have an excess of negatively
charged carriers.
near constants Constants that can be accessed with nonextended
instructions. Constants in page 00H are near constants
(EP_REG = 00H is assumed). See also far constants.
near data Data that can be accessed with nonextended instruc-
tions. Data in page 00H is near data (EP_REG = 00H
is assumed). See also far data.
nonmaskable interrupts Interrupts that cannot be masked (disabled) and
cannot be assigned to the PTS for processing. The
nonmaskable interrupts are unimplemented opcode,
software trap, and NMI.