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8XC196NP, 80C196NU USER’S MANUAL
C-18
EPA_MASK
EPA_MASK
Address:
Reset State:
1F9CH
AAH
The EPA interrupt mask (EPA_MASK) register enables or disables (masks) the multiplexed EPA3:0
overrun interrupts (OVR3:0).
7 0
— OVR3 — OVR2 — OVR1 — OVR0
Bit
Number
Bit
Mnemonic
Function
7, 5, 3, 1 — Reserved; for compatibility with future devices, write zeros to these bits.
6, 4, 2, 0 OVR3
OVR2
OVR1
OVR0
Setting this bit enables the corresponding source as a shared overrun
interrupt source. The shared overrun interrupts (OVR0_1 and OVR2_3)
are enabled by setting their interrupt enable bits in the interrupt mask 1
(INT_MASK1) register.