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8XC196NP, 80C196NU USER’S MANUAL
xiv
TABLES
Table Page
1-1 Handbooks and Product Information............................................................................1-6
1-2 Application Notes, Application Briefs, and Article Reprints ..........................................1-6
1-3 MCS
®
96 Microcontroller Datasheets (Commercial/Express)......................................1-7
1-4 MCS
®
96 Microcontroller Datasheets (Automotive) .....................................................1-7
1-5 MCS
®
96 Microcontroller Quick References ................................................................1-8
2-1 Features of the 8XC196NP and 80C196NU.................................................................2-2
2-2 State Times at Various Frequencies ............................................................................2-9
2-3 Relationships Between Input Frequency, Clock Multiplier, and State Times.............2-10
3-1 Multiply/Accumulate Example Code.............................................................................3-2
3-2 Effect of SME and FME Bit Combinations....................................................................3-6
4-1 Operand Type Definitions.............................................................................................4-1
4-2 Equivalent Operand Types for Assembly and C Programming Languages .................4-2
4-3 Definition of Temporary Registers................................................................................4-7
5-1 8XC196NP and 80C196NU Memory Map....................................................................5-4
5-2 Program Memory Access for the 83C196NP ...............................................................5-5
5-3 8XC196NP and 80C196NU Special-purpose Memory Addresses...............................5-6
5-4 Special-purpose Memory Access for the 83C196NP ...................................................5-6
5-5 Peripheral SFRs...........................................................................................................5-8
5-6 Register File Memory Addresses ...............................................................................5-11
5-7 CPU SFRs..................................................................................................................5-12
5-8 Selecting a Window of Peripheral SFRs.....................................................................5-15
5-9 Selecting a Window of the Upper Register File..........................................................5-15
5-10 Windows.....................................................................................................................5-17
5-11 Windowed Base Addresses .......................................................................................5-18
5-12 Memory Map for the System in Figure 5-9.................................................................5-28
5-13 Memory Map for the System in Figure 5-10...............................................................5-30
5-14 Memory Map for the System in Figure 5-11...............................................................5-32
6-1 Interrupt Signals ...........................................................................................................6-3
6-2 Interrupt and PTS Control and Status Registers..........................................................6-3
6-3 Interrupt Sources, Vectors, and Priorities.....................................................................6-5
6-4 Execution Times for PTS Cycles................................................................................6-10
6-5 Single Transfer Mode PTSCB....................................................................................6-23
6-6 Block Transfer Mode PTSCB .....................................................................................6-23
6-7 Comparison of PWM Modes.......................................................................................6-26
6-8 PWM Toggle Mode PTSCB........................................................................................6-28
6-9 PWM Remap Mode PTSCB.......................................................................................6-33
7-1 Device I/O Ports ...........................................................................................................7-1
7-2 Bidirectional Port Pins ..................................................................................................7-2
7-3 Bidirectional Port Control and Status Registers ...........................................................7-3
7-4 Logic Table for Bidirectional Ports in I/O Mode............................................................7-6
7-5 Logic Table for Bidirectional Ports in Special-function Mode .......................................7-6
7-6 Control Register Values for Each Configuration...........................................................7-8
7-7 Port Configuration Example .........................................................................................7-8
7-8 Port Pin States After Reset and After Example Code Execution..................................7-9