Filter
Top Products
Index-7
INDEX
map, A-2
reserved, A-3, A-52
Operand types, See data types
Operands, addressing, 4-12
Operating modes, 2-12
See also 1-Mbyte mode, 64-Kbyte mode
OR instruction, A-2, A-33, A-49, A-54, A-61
ORB instruction, A-2, A-33, A-49, A-54, A-61
Oscillator
and powerdown mode, 12-7
external crystal, 11-6
on-chip, 11-5
Overflow (V) flag, A-4, A-5, A-25, A-26
Overflow-trap (VT) flag, A-4, A-5, A-11, A-26,
A-27
P
P1.7:0, B-9
See also port 1
P1_DIR, C-50, C-53
P1_MODE, C-50, C-53
P1_PIN, C-50, C-53
P1_REG, C-50, C-53
P2.2 considerations, 12-9
P2.7:0, B-9
See also port 2
P2_DIR, C-50, C-53
P2_MODE, C-50, C-53
P2_PIN, C-50, C-53
P2_REG, C-50, C-53
P3.7:0, B-9
See also port 3
P3_DIR, C-50, C-53
P3_MODE, C-50, C-53
P3_PIN, C-50, C-53
P3_REG, C-50, C-53
P4.3:0, B-9
See also port 4
P4_DIR, C-51, C-53
P4_MODE, C-51, C-53
P4_PIN, C-51, C-53
P4_REG, C-51, C-53
Pages (memory), 5-1, 5-2
page 00H, 5-3, 5-22
page 0FH, 5-2
page FFH, 5-2, 5-25
accessing, 5-22
page number and EPORT, 5-23
Parameters, passing to subroutines, 4-13
Parity, 8-6, 8-7
PC (program counter), 2-4, 5-23
extended, 2-6, 5-23, 5-25, 7-13
master, 2-4, 2-5
slave, 2-5, 2-6
Period (t), 2-9
Peripherals, internal, 2-11
Pin diagrams, B-1
PLLEN2:1, 2-9, 12-2, B-10
PLM-96
conventions, 4-11, 4-12, 4-13
interrupt procedures, 4-13
POP instruction, A-3, A-33, A-51, A-55, A-62
POPA instruction, A-2, A-34, A-52, A-55, A-62
POPF instruction, A-2, A-34, A-52, A-55, A-62
Port 1, 2-11, B-9
considerations, 7-9
input buffer, 7-4
logic tables, 7-6
operation, 7-1, 7-3
overview, 7-1
SFRs, 7-3
See also EPA
Port 2, 2-11, B-9
considerations, 7-9
operation, 7-1, 7-3
overview, 7-1
P2.2 considerations, 7-9
P2.4 considerations, 7-9
P2.5 considerations, 7-9
P2.7 considerations, 7-10
P2.7 reset status, 7-4, 7-10
SFRs, 7-3
See also SIO port
Port 3
considerations, 7-10
operation, 7-1, 7-3
overview, 7-1
SFRs, 7-3
Port 4
considerations, 7-10
operation, 7-1, 7-3, 7-10
overview, 7-1
SFRs, 7-3
Port, serial‚ See SIO port
Ports, general-purpose I/O, 2-11