Filter
Top Products
8XC196NP, 80C196NU USER’S MANUAL
Index-6
JNC instruction, A-2, A-5, A-24, A-51, A-58,
A-66
JNE instruction, A-2, A-5, A-24, A-51, A-58, A-66
JNH instruction, A-2, A-5, A-25, A-51, A-58,
A-66
JNST instruction, A-2, A-5, A-25, A-51, A-58,
A-66
JNV instruction, A-2, A-5, A-25, A-51, A-58,
A-66
JNVT instruction, A-2, A-5, A-26, A-51, A-58,
A-66
JST instruction, A-3, A-5, A-26, A-51, A-58, A-66
Jump instructions, A-64
conditional, A-5, A-58, A-66
unconditional, A-57
JV instruction, A-3, A-5, A-26, A-51, A-58, A-66
JVT instruction, A-3, A-5, A-27, A-51, A-58, A-66
L
Latency‚ See bus-hold protocol‚ interrupts
LCALL instruction, A-3, A-27, A-52, A-57, A-65
LD instruction, A-2, A-27, A-50, A-56, A-63
LDB instruction, A-2, A-28, A-50, A-56, A-63
LDBSE instruction, A-3, A-28, A-50, A-56, A-63
LDBZE instruction, A-3, A-28, A-50, A-56, A-63
Level-sensitive input, B-6
Literature, 1-11
LJMP instruction, A-2, A-28, A-52, A-57, A-64
Logical instructions, A-54, A-61
LONG-INTEGER, defined, 4-4
Lookup tables, software protection, 4-14
M
Manual contents, summary, 1-1
Manuals, online, 1-10
Math features, 3-1–3-6
Measurements, defined, 1-5
Memory bus, 2-5
Memory configuration, examples, 5-27–5-32
Memory controller, 2-3, 2-5
Memory map, 5-3
Example of 1-Mbyte mode, 5-32
Example of 64-Kbyte mode, 5-28, 5-30
Memory, external, 13-1–13-45
interface signals, 13-2
Memory, reserved, 5-6, 5-7
Microcode engine, 2-3
Miller effect, 11-7
Mode 0, SIO, 8-4, 8-5
Mode 1, SIO, 8-5, 8-6
Mode 2, SIO, 8-5, 8-7, 8-8
Mode 3, SIO, 8-5, 8-7, 8-8
MODE64 bit, 5-23
MUL instruction, 3-1, A-29, A-52, A-54, A-61
MULB instruction, A-29, A-30, A-52, A-54, A-61
Multiplication instructions
multiply/accumulate example code, 3-2
See also MUL instruction, MULU instruction
Multiprocessor communications
SIO port, 8-7, 8-8
MULU instruction, 3-1, A-3, A-30, A-48, A-49,
A-52, A-54, A-61
MULUB instruction, A-3, A-31, A-48, A-49,
A-54, A-61
N
Naming conventions, 1-3–1-4
NEG instruction, A-2, A-31, A-47, A-54, A-61
Negative (N) flag, A-4, A-5, A-22, A-23, A-24
NEGB instruction, A-2, A-31, A-47, A-54, A-61
NMI, 6-3, 6-4, 6-6, B-9
and bus-hold protocol, 13-33
hardware considerations, 6-6
Noise, reducing, 7-1, 7-4, 11-4, 11-5, 11-6
Nonextended addressing, 5-23
NOP instruction, 4-14, A-3, A-31, A-52, A-59,
A-67
two-byte‚ See SKIP instruction
NORML instruction, 4-5, A-3, A-32, A-47, A-59,
A-66
NOT instruction, A-2, A-32, A-47, A-54, A-61
Notational conventions, 1-3–1-4
NOTB instruction, A-2, A-32, A-47, A-54, A-61
Numbers, conventions, 1-4
O
ONCE, 12-1, B-9
ONCE mode, 2-12, 12-12
entering, 12-12
exiting, 12-12
Opcodes, A-47
EE, and unimplemented opcode interrupt,
A-3, A-52
FE, and signed multiply and divide, A-3