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12-6
8XC196NP, 80C196NU USER’S MANUAL
The device enters idle mode after executing the IDLPD #1 instruction. Any enabled interrupt
source, either internal or external, or a hardware reset can cause the device to exit idle mode.
When an interrupt occurs, the CPU clocks restart and the CPU executes the corresponding inter-
rupt service or PTS routine. When the routine is complete, the CPU fetches and then executes the
instruction that follows the IDLPD #1 instruction.
NOTE
To prevent an accidental return to full power, hold the external interrupt pins
(EXTINTx) low while the device is in idle mode.
12.4 STANDBY MODE (80C196NU ONLY)
In standby mode, the device’s power consumption decreases to approximately 10% of normal
consumption. Internal logic holds the CPU and peripheral clocks at logic zero, which causes the
CPU to stop executing instructions, the system bus control signals to become inactive, and the
peripherals to turn off. The phase-locked loop (PLL) circuitry and the on-chip oscillator continue
to operate. Table B-5 on page B-13 lists the values of the pins during standby mode.
12.4.1 Enabling and Disabling Standby Mode
Setting the PD bit in the chip-configuration register 0 (CCR0.0) enables both standby and pow-
erdown modes. Clearing it disables both modes. CCR0 is loaded from the chip configuration byte
(CCB0) when the device is reset.
12.4.2 Entering Standby Mode
Before entering standby mode, complete the following tasks:
• Complete all serial port transmissions or receptions. Otherwise, when the device exits
standby, the serial port activity will continue where it left off and incorrect data may be
transmitted or received.
• Put all other peripherals into an inactive state.
After completing these tasks, execute the IDLPD #3 instruction to enter standby mode.
NOTE
To prevent an accidental return to full power, hold the external interrupt pins
(EXTINTx) low while the device is in standby mode.