Filter
Top Products
15-35
INTERFACING WITH EXTERNAL MEMORY
T
WHAX
Address (high byte) Hold after WR# High
Minimum time the high byte of the address (when using an 8-bit data bus) is valid after the
microcontroller deasserts WR#.
T
WHBX
BHE#, INST Hold after WR# High
Minimum time these signals are valid after the microcontroller deasserts WR#.
T
WHLH
WR# High to ALE High
Time between the microcontroller deasserting WR# and next ALE pulse. Maximum time the
memory system has to get data off the bus before the next address cycle.
T
WHQX
Output Data Hold after WR# High
Length of time output data is valid on the bus after the microcontroller deasserts WR#.
T
WLWH
WR# Low to WR# High
WR# pulse width.
T
XHCH
†
XTAL1 High to CLKOUT High or Low
T
XTAL1
1/F
XTAL1
The period of the frequency on the XTAL1 input (F
XTAL1
). All AC timings are referenced to
T
XTAL1
.
Table 15-9. Microcontroller Meets These Specifications (Continued)
Symbol Definition
†
The CLKOUT pin is available only on the 8XC196MC, MD microcontrollers.