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8XC196MC, MD, MH USER’S MANUAL
xiv
FIGURES
Figure Page
12-3 A/D Result (AD_RESULT) Register — Write Format.................................................12-6
12-4 A/D Time (AD_TIME) Register ...................................................................................12-7
12-5 A/D Command (AD_COMMAND) Register ................................................................12-8
12-6 A/D Result (AD_RESULT) Register — Read Format.................................................12-9
12-7 Idealized A/D Sampling Circuitry..............................................................................12-10
12-8 Suggested A/D Input Circuit .....................................................................................12-12
12-9 Ideal A/D Conversion Characteristic.........................................................................12-15
12-10 Actual and Ideal A/D Conversion Characteristics.....................................................12-16
12-11 Terminal-based A/D Conversion Characteristic .......................................................12-18
13-1 Minimum Hardware Connections ...............................................................................13-3
13-2 Power and Return Connections .................................................................................13-4
13-3 On-chip Oscillator Circuit............................................................................................13-5
13-4 External Crystal Connections .....................................................................................13-6
13-5 External Clock Connections .......................................................................................13-7
13-6 External Clock Drive Waveforms................................................................................13-7
13-7 Reset Timing Sequence .............................................................................................13-8
13-8 General Configuration Register (GEN_CON)............................................................13-9
13-9 Internal Reset Circuitry.............................................................................................13-10
13-10 Minimum Reset Circuit .............................................................................................13-11
13-11 Example of a System Reset Circuit..........................................................................13-11
14-1 Clock Control During Power-saving Modes................................................................14-4
14-2 Power-up and Power-down Sequence When Using an External Interrupt.................14-7
14-3 External RC Circuit.....................................................................................................14-8
14-4 Typical Voltage on the V
PP
Pin While Exiting Powerdown.........................................14-9
15-1 Chip Configuration 0 (CCR0) Register .......................................................................15-7
15-2 Chip Configuration 1 (CCR1) Register .......................................................................15-9
15-3 Multiplexing and Bus Width Options.........................................................................15-11
15-4 BUSWIDTH Timing Diagram (8XC196MC, MD) ......................................................15-12
15-5 BUSWIDTH Timing Diagram (8XC196MH)..............................................................15-12
15-6 Timings for 16-bit Buses...........................................................................................15-15
15-7 Timings for 8-bit Buses.............................................................................................15-17
15-8 READY Timing Diagram — One Wait State (8XC196MC, MD) ...............................15-19
15-9 READY Timing Diagram — One Wait State (8XC196MH).......................................15-20
15-10 Standard Bus Control ...............................................................................................15-22
15-11 Decoding WRL# and WRH#.....................................................................................15-22
15-12 8-bit System with Flash and RAM ............................................................................15-23
15-13 16-bit System with Dynamic Bus Width....................................................................15-24
15-14 Write Strobe Mode ...................................................................................................15-25
15-15 16-bit System with Writes to Byte-wide RAMs .........................................................15-26
15-16 Address Valid Strobe Mode......................................................................................15-27
15-17 Comparison of ALE and ADV# Bus Cycles..............................................................15-27
15-18 8-bit System with Flash ............................................................................................15-28
15-19 16-bit System with EPROM......................................................................................15-29
15-20 Timings of Address Valid with Write Strobe Mode ...................................................15-30