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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
User manual Rev. 02 — 23 May 2005 83 of 133
Philips Semiconductors
UM10109
P89LPC932A1 User manual
12. Serial Peripheral Interface (SPI)
The P89LPC932A1 provides another high-speed serial communication interface, the SPI
interface. SPI is a full-duplex, high-speed, synchronous communication bus with two
operation modes: Master mode and Slave mode. Up to 3 Mbit/s can be supported in either
Master or Slave mode. It has a Transfer Completion Flag and Write Collision Flag
Protection.
C0H Data byte in
I2DAT has been
transmitted;
NACK has been
received
No I2DAT action
or
0000Switched to not addressed SLA
mode; no recognition of own SLA or
General call address.
no I2DAT action or0001Switched to not addressed SLA
mode; Own slave address will be
recognized; General call address
will be recognized if I2ADR.0 = 1.
no I2DAT action or1000Switched to not addressed SLA
mode; no recognition of own SLA or
General call address. A START
condition will be transmitted when
the bus becomes free.
no I2DAT action 1001Switched to not addressed SLA
mode; Own slave address will be
recognized; General call address
will be recognized if I2ADR.0 = 1. A
START condition will be transmitted
when the bus becomes free.
C8H Last data byte in
I2DAT has been
transmitted
(AA = 0); ACK has
been received
No I2DAT action
or
0000Switched to not addressed SLA
mode; no recognition of own SLA or
General call address.
no I2DAT action or0001Switched to not addressed SLA
mode; Own slave address will be
recognized; General call address
will be recognized if I2ADR.0 = 1.
no I2DAT action or1000Switched to not addressed SLA
mode; no recognition of own SLA or
General call address. A START
condition will be transmitted when
the bus becomes free.
no I2DAT action 1001Switched to not addressed SLA
mode; Own slave address will be
recognized; General call address
will be recognized if I2ADR.0 = 1. A
START condition will be transmitted
when the bus becomes free.
Table 71: Slave Transmitter mode
…continued
Status code
(I2STAT)
Status of the I
2
C
hardware
Application software response Next action taken by I
2
C
hardware
to/from I2DAT to I2CON
STA STO SI AA