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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
User manual Rev. 02 — 23 May 2005 125 of 133
Philips Semiconductors
UM10109
P89LPC932A1 User manual
18.19 Boot Vector register
18.20 Boot status register
Table 105: Effects of Security Bits
EDISx SPEDISx MOVCDISx Effects on Programming
000None.
0 0 1 Security violation flag set for sector CRC calculation for the specific sector.
Security violation flag set for global CRC calculation if any MOVCDISx bit is set.
Cycle aborted. Memory contents unchanged. CRC invalid. Program/erase
commands will not result in a security violation.
0 1 x Security violation flag set for program commands or an erase page command.
Cycle aborted. Memory contents unchanged. Sector erase and global erase are
allowed.
1 x x Security violation flag set for program commands or an erase page command.
Cycle aborted. Memory contents unchanged. Global erase is allowed.
Table 106: Boot Vector (BOOTVEC) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol---BOOTV4BOOTV3BOOTV2BOOTV1BOOTV0
Factory default
value
00011111
Table 107: Boot Vector (BOOTVEC) bit description
Bit Symbol Description
0:4 BOOTV[0:4] Boot vector. If the Boot Vector is selected as the reset address, the P89LPC932A1 will start execution at
an address comprised of 00h in the lower eight bits and this BOOTVEC as the upper eight bits after a
reset.
5:7 - reserved
Table 108: Boot Status (BOOTSTAT) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol DCCP CWP AWP -----BSB
Factory default
value
00000001
Table 109: Boot Status (BOOTSTAT) bit description
Bit Symbol Description
0 BSB Boot Status Bit. If programmed to logic 1, the P89LPC932A1 will always start execution at an address
comprised of 00H in the lower eight bits and BOOTVEC as the upper bits after a reset. (See Section 6.1
“Reset vector”).
1:4 - reserved