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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
User manual Rev. 02 — 23 May 2005 102 of 133
Philips Semiconductors
UM10109
P89LPC932A1 User manual
15.3 Watchdog clock source
The watchdog timer system has an on-chip 400 KHz oscillator. The watchdog timer can
be clocked from either the watchdog oscillator or from PCLK (refer to Figure 47
) by
configuring the WDCLK bit in the Watchdog Control Register WDCON. When the
watchdog feature is enabled, the timer must be fed regularly by software in order to
prevent it from resetting the CPU.
After changing WDCLK (WDCON.0), switching of the clock source will not immediately
take effect. As shown in Figure 49
, the selection is loaded after a watchdog feed
sequence. In addition, due to clock synchronization logic, it can take two old clock cycles
before the old clock source is deselected, and then an additional two new clock cycles
before the new clock source is selected.
Since the prescaler starts counting immediately after a feed, switching clocks can cause
some inaccuracy in the prescaler count. The inaccuracy could be as much as 2 old clock
source counts plus 2 new clock cycles.
Note: When switching clocks, it is important that the old clock source is left enabled for
two clock cycles after the feed completes. Otherwise, the watchdog may become disabled
when the old clock source is disabled. For example, suppose PCLK (WCLK = 0) is the
current clock source. After WCLK is set to logic 1, the program should wait at least two
PCLK cycles (4 CCLKs) after the feed completes before going into Power-down mode.
Otherwise, the watchdog could become disabled when CCLK turns off. The watchdog
oscillator will never become selected as the clock source unless CCLK is turned on again
first.
110 0 2,049 5.12 ms 341.5 µs
255 524,289 1.31 s 87.4 ms
111 0 4097 10.2 ms 682.8 µs
255 1,048,577 2.62 s 174.8 ms
Table 89: Watchdog timeout vales
…continued
PRE2 to PRE0 WDL in decimal) Timeout Period
(in watchdog clock
cycles)
Watchdog Clock Source
400 KHz Watchdog
Oscillator Clock
(Nominal)
12 MHz CCLK (6 MHz
CCLK
⁄
2
Watchdog
Clock)