Filter
Top Products
4-1
CHAPTER 4
MEMORY PARTITIONS
This chapter describes the address space, its major partitions, and a windowing technique for ac-
cessing the upper register file and peripheral SFRs with register-direct instructions.
4.1 MEMORY PARTITIONS
Table 4-1 is a memory map of the 8XC196Mx devices. The remainder of this section describes
the partitions.
4.1.1 External Devices (Memory or I/O)
Several partitions are assigned to external devices (see Table 4-1). Data can be stored in any part
of this memory. Chapter 15, “Interfacing with External Memory,” describes the external memory
interface and shows examples of external memory configurations. These partitions can also be
used to interface with external peripherals connected to the address/data bus.
4.1.2 Program and Special-purpose Memory
Internal nonvolatile memory is an optional component of the 8XC196Mx devices. Various devic-
es are available with masked ROM, EPROM, QROM, or OTPROM. Please consult the
datasheets in the Embedded Microcontrollers databook for details.
If present, the nonvolatile memory occupies the special-purpose memory and program memory
partitions (locations 2000H and above; see Table 4-1 on page 4-2). The EA# signal controls ac-
cess to these memory partitions. Accesses to these partitions are directed to internal memory if
EA# is held high and to external memory if EA# is held low. For devices without internal non-
volatile memory, the EA# signal must be tied low. EA# is latched at reset.