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A-39
INSTRUCTION SET REFERENCE
TIJMP TABLE INDIRECT JUMP. Causes execution
to continue at an address selected from a
table of addresses.
The first word register, TBASE, contains the
16-bit address of the beginning of the jump
table. TBASE can be located in RAM up to
FEH without windowing or above FFH with
windowing. The jump table itself can be
placed at any nonreserved memory location
on a word boundary.
The second word register, INDEX, contains
the 16-bit address that points to a register
containing a 7-bit value. This value is used to
calculate the offset into the jump table. Like
TBASE, INDEX can be located in RAM up to
FEH without windowing or above FFH with
windowing. Note that the 16-bit address
contained in INDEX is absolute; it disregards
any windowing that may be in effect when the
TIJMP instruction is executed.
The byte operand, #MASK, is 7-bit immediate
data to mask INDEX. #MASK is ANDed with
INDEX to determine the offset (OFFSET).
OFFSET is multiplied by two, then added to
the base address (TBASE) to determine the
destination address (DEST X).
[INDEX] AND #MASK = OFFSET
(2 × OFFSET) + TBASE = DEST X
PC
← (DEST X)
TIJMP TBASE, [INDEX], #MASK
(11100010) [INDEX] (#MASK) (TBASE)
NOTE: TIJMP multiplies OFFSET by two
to provide for word alignment of
the jump table.
PSW Flag Settings
ZNCVVTST
——————
TRAP SOFTWARE TRAP. This instruction causes
an interrupt call that is vectored through
location 2010H. The operation of this
instruction is not affected by the state of the
interrupt enable flag (I) in the PSW. Interrupt
calls cannot occur immediately following this
instruction.
SP
← SP – 2
(SP)
← PC
PC
← (2010H)
TRAP
(11110111)
NOTE: This instruction is not supported
by assemblers. The TRAP
instruction is intended for use by
development tools. These tools
may not support user-application
of this instruction.
PSW Flag Settings
ZNCVVTST
——————
Table A-6. Instruction Set (Continued)
Mnemonic Operation Instruction Format