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ARCHITECTURAL OVERVIEW
Figure 2-1. 8XC196M
x
Block Diagram
Figure 2-2. Block Diagram of the Core
A2798-02
Optional
ROM
Core
Clock and
Power Mgmt.
PTS
WG
PWMI/O
A/DEPA
WDT
Interrupt
Controller
FG
SIO
Note:
The frequency generator is unique to the 8XC196MD.
The serial I/O port is unique to the 8XC196MH.
A2797-01
Register File
Register
RAM
CPU SFRs
RALU
Microcode
Engine
ALU
Master PC
Memory Controller
Prefetch Queue
Slave PC
Address Register
Data Register
CPU
Bus Controller
PSW
Registers