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C-7
REGISTERS
AD_RESULT (Read)
AD_RESULT (Read)
Address:
Reset State (MC, MD):
Reset State (MH):
1FAAH
FFC0H
7FC0H
The A/D result (AD_RESULT) register consists of two bytes. The high byte contains the eight most-
significant bits from the A/D converter. The low byte contains the two least-significant bits from a ten-
bit A/D conversion, indicates the A/D channel number that was used for the conversion, and indicates
whether a conversion is currently in progress.
15 8
ADRLT9 ADRLT8 ADRLT7 ADRLT6 ADRLT5 ADRLT4 ADRLT3 ADRLT2
7 0
ADRLT1 ADRLT0 — STATUS ACH3 ACH2 ACH1 ACH0
Bit
Number
Bit
Mnemonic
Function
15:6 ADRLT9:0 A/D Result
These bits contain the A/D conversion result.
5 — Reserved. This bit is undefined.
4 STATUS A/D Status
Indicates the status of the A/D converter. Up to 8 state times are required
to set this bit following a start command. When testing this bit, wait at
least the 8 state times.
0 = A/D is idle
1 = A/D conversion is in progress
3:0 ACH3:0 A/D Channel Number
These bits indicate the A/D channel number that was used for the
conversion.