Filter
Top Products
8XC196MC, MD, MH USER’S MANUAL
A-34
SHRA ARITHMETIC RIGHT SHIFT WORD. Shifts
the destination word operand to the right as
many times as specified by the count
operand. The count may be specified either
as an immediate value in the range of 0 to 15
(0FH), inclusive, or as the content of any
register (10H – 0FFH) with a value in the
range of 0 to 31 (1FH), inclusive. If the
original high order bit value was “0,” zeros are
shifted in. If the value was “1,” ones are
shifted in. The last bit shifted out is saved in
the carry flag.
Temp
← (COUNT)
do while Temp
≠ 0
C
← Low order bit of (DEST)
(DEST)
← (DEST)/2
Te mp
← Temp – 1
end_while
SHRA wreg, #count
(00001010) (count) (wreg)
or
SHRA wreg, breg
(00001010) (breg) (wreg)
NOTES: This instruction clears the
sticky bit flag at the beginning
of the instruction. If at any time
during the shift a “1” is shifted
into the carry flag and another
shift cycle occurs, the instruc-
tion sets the sticky bit flag.
In this operation, (DEST)/2 rep-
resents signed division.
PSW Flag Settings
ZNCVVTST
✓✓✓0—✓
SHRAB ARITHMETIC RIGHT SHIFT BYTE. Shifts the
destination byte operand to the right as many
times as specified by the count operand. The
count may be specified either as an
immediate value in the range of 0 to 15
(0FH), inclusive, or as the content of any
register (10H – 0FFH) with a value in the
range of 0 to 31 (1FH), inclusive. If the
original high order bit value was “0,” zeros are
shifted in. If the value was “1,” ones are
shifted in. The last bit shifted out is saved in
the carry flag.
Temp
← (COUNT)
do while Temp
≠ 0
C = Low order bit of (DEST)
(DEST)
← (DEST)/2
Te mp
← Temp – 1
end_while
SHRAB breg, #count
(00011010) (count) (breg)
or
SHRAB breg, breg
(00011010) (breg) (breg)
NOTES: This instruction clears the
sticky bit flag at the beginning
of the instruction. If at any time
during the shift a “1” is shifted
into the carry flag and another
shift cycle occurs, the instruc-
tion sets the sticky bit flag.
In this operation, (DEST)/2 rep-
resents signed division.
PSW Flag Settings
ZNCVVTST
✓✓✓0—✓
Table A-6. Instruction Set (Continued)
Mnemonic Operation Instruction Format