Filter
Top Products
Asynchronous Serial Port
11-6
11.2.4 Serial Port Receive Data Register (SPRD, Offset 86h)
This register (Figure 11-4) contains data received over the serial port. The receiver is
double-buffered, and the receive section can be receiving a subsequent frame of data in
the receive shift register (which is not accessible to software) while the receive data register
is being read by software.
Figure 11-4 Serial Port Receive Data Register (SPRD, offset 86h)
The value of SPRD at reset is undefined.
Bits 15–8: Reserved
Bits 7–0: Receive Data (RDATA)—This field contains data received on the serial port.
The RDR bit of the Serial Port Status register indicates valid data in the SPRD register. To
avoid reading invalid data, the RDR bit should be read as a 1 before the SPRD register is
read. Reading this register causes the RDR bit to be reset.
15
70
Reserved
RDATA