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System Overview
3-2
The address phase of these pins can be disabled. See the ADEN
description with the BHE
/ADEN pin. When WLB is not asserted, these
pins are three-stated during t
2
, t
3
, and t
4
.
During a bus hold or reset condition, the address and data bus is in a
high-impedance state.
During a power-on reset, the address and data bus pins (AD15–AD0
for the Am186ER microcontroller, AO15–AO8 and AD7–AD0 for the
Am188ER microcontroller) can also be used to load system
configuration information into the internal Reset Configuration Register.
The system information is latched on the rising edge of RES.
AD15–AD8 Address and Data Bus, Am186ER Microcontroller Only
(input/output, three-state, synchronous, level-sensitive)
These time-multiplexed pins supply partial memory or I/O addresses,
as well as data, to the system. AD15–AD8 supply the high-order 8 bits
of an address to the system during the first period of a bus cycle (t
1
).
On a write, these pins supply data to the system during the remaining
periods of that cycle (t
2
, t
3
, and t
4
). On a read, these pins latch data at
the end of t
3
.
Also, if S0
/SREN (show read enable) was pulled Low during reset or if
the SR bit is set in the Internal Memory Chip Select (IMCS) Register,
these pins supply the data read from internal memory during t
3
and t
4
.
On the Am186ER microcontroller, AD15–AD8 combine with AD7–AD0
to form a complete multiplexed address and 16-bit data bus.
The address phase of these pins can be disabled. See the ADEN
description with the BHE
/ADEN pin. When WHB is not asserted, these
pins are three-stated during t
2
, t
3
, and t
4
.
During a bus hold or reset condition, the address and data bus is in a
high-impedance state. During a power-on reset, the address and data
bus pins (AD15–AD0 for the Am186ER microcontroller, AO15–AO8 and
AD7–AD0 for the Am188ER microcontroller) can also be used to load
system configuration information into the internal Reset Configuration
Register. The system information is latched on the rising edge of RES.
AO15–AO8 Address-Only Bus, Am188ER Microcontroller Only
(output, three-state, synchronous, level-sensitive)
The address-only bus (AO15–AO8) contains valid high-order address
bits from bus cycles t
1
–t
4
. These outputs are three-stated during a bus
hold or reset.
On the Am188ER microcontroller, AO15–AO8 combine with AD7–AD0
to form a complete multiplexed address bus while AD7–AD0 is the 8-bit
data bus.
During a power-on reset on the Am188ER microcontroller, the AO15–
AO8 and AD7–AD0 pins can also be used to load system configuration
information into an internal register for later use.
ALE Address Latch Enable (output, synchronous)
This pin indicates to the system that an address appears on the address
and data bus (AD15–AD0 for the Am186ER microcontroller or AO15–