AMD Am188TMER Microscope & Magnifier User Manual


 
Interrupt Control Unit
8-28
8.3.14 End-of-Interrupt Register (EOI, Offset 22h)
(Master Mode)
The End-of-Interrupt (EOI) Register is a write-only register. The in-service flags in the In-
Service Register (see section 8.3.9 on page 8-23) are reset by writing to the EOI Register.
Before executing the IRET instruction that ends an interrupt service routine (ISR), the ISR
should write to the EOI Register to reset the IS bit for the interrupt.
The specific EOI reset is the most secure method to use for resetting IS bits. Figure 8-17
shows example code for a specific EOI reset. See Table 8-1, “Am186ER and Am188ER
Microcontroller Interrupt Types,” on page 8-3 for specific EOI values.
Figure 8-17 Example EOI Assembly Code
Figure 8-18 End-of-Interrupt Register (EOI, offset 22h)
Bit 15: Non-Specific EOI (NSPEC)—The NSPEC bit determines the type of EOI command.
When written as a 1, NSPEC indicates non-specific EOI. When written as a 0, NSPEC
indicates the specific EOI interrupt type is in S4–S0.
Bits 14–5: Reserved
Bits 4–0: Source Interrupt Type (S4–S0)—Specifies the type of the interrupt that is
currently being processed. See Table 8-1, “Am186ER and Am188ER Microcontroller
Interrupt Types,” on page 8-3.
...
... ;ISR code
...
exit: mov ax,int_type ;load the interrupt type in ax
mov dx, 0ff22h ;load default EOI location in dx
out dx,ax ;write the interrupt type to EOI
popa
iret ;return from interrupt
15
70
S4–S0
NSPEC
Reserved