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A-115
INSTRUCTION SET REFERENCE
RETI
Function: Return from interrupt
Description: This instruction pops two or four bytes from the stack, depending on the INTR bit in the
CONFIG1 register.
If INTR = 0, RETI pops the high and low bytes of the PC successively from the stack and
uses them as the 16-bit return address in region FF:. The stack pointer is decremented by
two. No other registers are affected, and neither PSW nor PSW1 is automatically restored to
its pre-interrupt status.
If INTR = 1, RETI pops four bytes from the stack: PSW1 and the three bytes of the PC. The
three bytes of the PC are the return address, which can be anywhere in the 16-Mbyte
memory space. The stack pointer is decremented by four. PSW1 is restored to its pre-
interrupt status, but PSW is not restored to its pre-interrupt status. No other registers are
affected.
For either value of INTR, hardware restores the interrupt logic to accept additional interrupts
at the same priority level as the one just processed. Program execution continues at the
return address, which normally is the instruction immediately after the point at which the
interrupt request was detected. If an interrupt of the same or lower priority is pending when
the RETI instruction is executed, that one instruction is executed before the pending
interrupt is processed.
Flags:
Example: INTR = 0. The stack pointer contains 0BH. An interrupt was detected during the instruction
ending at location 0122H. On-chip RAM locations 0AH and 0BH contain 01H and 23H,
respectively. After executing the instruction
RETI
the stack pointer contains 09H and program execution continues at location 0123H.
Binary Mode Source Mode
Bytes: 11
States (INTR = 0): 99
States (INTR = 1): 12 12
Hex Code in: Binary Mode = [Encoding]
Source Mode = [Encoding]
Operation for INTR = 0:
RETI
(PC).15:8 ←((SP))
(SP) ← (SP) – 1
(PC).7:0 ← ((SP))
(SP) ←(SP) – 1
CY AC OV N Z
—————
[Encoding] 0 0 1 1 0 0 1 0