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CONTENTS
ix
CHAPTER 14
PROGRAMMING AND VERIFYING
NONVOLATILE MEMORY
14.1 GENERAL.................................................................................................................... 14-1
14.1.1 Programming Considerations for On-chip Code Memory .......................................14-2
14.1.2 EPROM Devices .....................................................................................................14-3
14.2 PROGRAMMING AND VERIFYING MODES.............................................................. 14-3
14.3 GENERAL SETUP....................................................................................................... 14-3
14.4 PROGRAMMING ALGORITHM................................................................................... 14-5
14.5 VERIFY ALGORITHM.................................................................................................. 14-6
14.6 PROGRAMMABLE FUNCTIONS................................................................................ 14-6
14.6.1 On-chip Code Memory ............................................................................................14-7
14.6.2 Configuration Bytes .................................................................................................14-7
14.6.3 Lock Bit System ......................................................................................................14-7
14.6.4 Encryption Array .....................................................................................................14-8
14.6.5 Signature Bytes .......................................................................................................14-8
14.7 VERIFYING THE 83C251SA, SB, SP, SQ (ROM) ...................................................... 14-9
APPENDIX A
INSTRUCTION SET REFERENCE
A.1 NOTATION FOR INSTRUCTION OPERANDS............................................................ A-2
A.2 OPCODE MAP AND SUPPORTING TABLES ............................................................. A-4
A.3 INSTRUCTION SET SUMMARY................................................................................ A-11
A.3.1 Execution Times for Instructions that Access the Port SFRs ................................ A-11
A.3.2 Instruction Summaries ..........................................................................................A-14
APPENDIX B
SIGNAL DESCRIPTIONS
APPENDIX C
REGISTERS
GLOSSARY
INDEX