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8XC251SA, SB, SP, SQ USER’S MANUAL
12-4
12.3 IDLE MODE
Idle mode is a power reduction mode that reduces power consumption to about 40% of normal.
In this mode, program execution halts. Idle mode freezes the clocks to the CPU at known states
while the peripherals continue to be clocked (Figure 12-2). The CPU status before entering idle
mode is preserved; i.e., the program counter, program status word register, and register file retain
their data for the duration of idle mode. The contents of the SFRs and RAM are also retained. The
status of the port pins depends upon the location of the program memory.
• Internal program memory: the ALE and PSEN# pins are pulled high and the ports 0, 1, 2,
and 3 pins are reading data (Table 12-1).
• External program memory: the ALE and PSEN# pins are pulled high; the port 0 pins are
floating; and the pins of ports 1, 2, and 3 are reading data (Table 12-1).
NOTE
If desired, the PCA may be instructed to pause during idle mode by setting the
CIDL bit in the CMOD register (Figure 9-7 on page 9-13).
12.3.1 Entering Idle Mode
To enter idle mode, set the PCON register IDL bit. The 8XC251Sx enters idle mode upon execu-
tion of the instruction that sets the IDL bit. The instruction that sets the IDL bit is the last instruc-
tion executed.
CAUTION
If the IDL bit and the PD bit are set simultaneously, the 8XC251Sx enters
powerdown mode.