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Celeron™ Processor Development Kit Manual
A-1
PLD Code Listing A
The code listing below is for the 22V10 PLD.
TITLE 22V10 PORT 80 ADDRESS DECODER / FLASH DECODE
PATTERN 1
REVISION B
AUTHOR CHRIS BANYAI
COMPANY INTEL CORPORATION
DATE 10/1/97
OPTIONS
SECURITY = OFF
; ( part was 22V10FN before conversion )
CHIP P80B iPLD22V10N
PIN 19 IOWR_BAR
PIN 3 AEN
PIN [6:7] SA[0:1]
PIN [9:13] SA[2:6]
PIN 16 SA7
PIN [5:4] SA[8:9]
PIN [26:23] SA[19:16]
PIN [21:20] SA[15:14]
PIN 2 SEL
PIN 18 /CS_BAR
PIN 17 /CS_DOC
PIN 27 OX
EQUATIONS
CS_BAR = /IOWR_BAR * /AEN * /SA0 * /SA1 * /SA2 * /SA3 * /SA4 * /SA5 * /SA6
* SA7 * /SA8 * /SA9
CS_BAR.TRST = VCC
CS_DOC = /SEL * /AEN * SA19 * SA18 * /SA17 * /SA16 * SA15 * /SA14
+ SEL * /AEN * SA19 * SA18 * /SA17 * SA16 * /SA15 * /SA14
CS_DOC.TRST = VCC
OX = /IOWR_BAR
OX.TRST = VCC
SIMULATION
SETF /AEN /SA0 /SA1 /SA2 /SA3 /SA4 /SA5 /SA6 /SA7 /SA8 /SA9 IOWR_BAR
SETF SA7 IOWR_BAR
SETF /IOWR_BAR
SETF IOWR_BAR