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Celeron™ Processor Development Kit Manual
Hardware Reference
4.7.4 Flash BIOS VPP Select (J21)
This jumper controls the voltage presented to the flash BIOS VPP pin. The 2-3 position supplies
5 V and is the default for normal operation. This position inhibits programming or erasing the flash
BIOS.
The 1-2 position supplies 12 V and should only be used if directed to do so by a utility that is used
to reprogram the BIOS.
4.7.5 Flash BIOS Boot Block Control (J22)
This jumper controls the Boot Block protection of the flash BIOS. When this jumper is in the 2-3
position, the boot block is locked and cannot be programmed. This is the default position of this
jumper.
The 1-2 position unlocks the boot block so that it can be erased and reprogrammed. This position
should only be used under the direction of a utility that is designed to reprogram the boot block of
the flash device.
4.7.6 SMI# Source Control (J23)
This jumper selects the source of the SMI# interrupt to the processor. Only the 2-3 position which
selects the PIIX4E is supported. The 1-2 position is reserved for future use.
4.7.7 CMOS RAM Clear (J24)
This jumper controls power to the battery backed-up CMOS RAM. This RAM is used to store
information about the system configuration that is required by the BIOS. The 1-2 position is for
normal operation. The 2-3 position allows for the RAM to be cleared.
To clear the RAM perform the following steps:
1. Remove power from the evaluation platform by removing jumper J20
2. Move J24 to the 2-3.
3. Disconnect the power supply (J11).
4. Install J24 in the 1-2 position.
5. Reconnect the power supply (J11).
6. Reboot the system and enter the BIOS setup screen to configure the system.
4.7.8 Push Button Switches
There are two push button switches on the evaluation board labeled S1 and S2.
• S1 is non-functional and reserved for future use.
• S2 is the reset button. Press S2 to force a hardware reset of the system.