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Celeron™ Processor Development Kit Manual
3-1
Theory of Operation
3
3.1 Block Diagram
Figure 3-1. Evaluation Board Block Diagram
Celeron™ Processor
Sensor
PIIX4E
DRAM Bus
ITP
Voltage
Regulator
72-Bit DIMM
72-Bit DIMM
USB
SMC FDC37B78X
SuperI/O*
PS/2 Mouse
Floppy Drive
ISA Bus
Boot
Flash
Thermal
PCI Connectors
ISA Connectors
Bus Master IDE
PS/2 Keyboard
I/O APIC
IEEE 1284 Parallel Port
COM1
COM2
Processor Assembly
Clock Generator
PCI Bus
AGP Connector
82443BX
Host Bridge/Controller
Processor
AGP Bus
XD Bus
with 128 Kbyte
VCCcore
Integrated L2 Cache
SMBus
Side Bus