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I-4 ADSP-21369 EZ-KIT Lite Evaluation System Manual
S
SDRAM
chip select pin (FLAG8), 2-6
configuration, 1-7
control signals, 2-7
via external port, 2-3
serial peripheral interconnect (SPI)
flash memory, xi, xii, 1-7, 1-8, 2-6
master/slave boot modes, 2-3, 2-9
session startup, 1-4
signal routing units
SRU2 (DPI interface), 2-5
SRU (DAI interface), 2-4
spacing headers, 2-24
SPDIF
input/output, xii
receiver, 1-9
SPI
master/slave boot modes, 2-9
SRAM
async memory controller, 1-8
configuration, 1-7
via external port, 2-3
stereo IO, xi
SW12 (reset) push button, 2-17
SW13 (ELVIS station) switch, 2-13
SW14 (test) switch, 2-12
SW1 (oscilloscope) switch, 2-13
SW2 (boot mode select) switch, 2-3, 2-6, 2-8
SW3 (AD1835A codec) switch, 2-5, 2-10
SW4 (microphone) switch, 1-10, 2-11
SW6 (test) switch, 2-12
SW7 (push buttons enable) DIP switch, 1-4,
1-11, 2-12, 2-16
SW8-11 (general input) push buttons, 2-16
synchronous dynamic random access memory,
See SDRAM
synchronous random access memory, See SRAM
system architecture, of this EZ-KIT Lite, 2-2
T
technical/customer support, xiv
test switches (SW6, SW14), 2-12
time-division multiplexed (TDM), 1-9
two-wire interface (TWI), 1-9
U
universal asynchronous receiver/transmitter
(UART)
enable switch (SW5), 2-11
interface, xi, 2-6
USB
cable, 1-3, 2-16, 2-17
connector (P5), 2-24
debug interface, 2-8, 2-25
interface chip (U34), 2-15, 2-17
monitor LED (LED11), 1-5
V
VisualDSP++
documentation, xx
online Help, xix
voltage, 2-17
voltage controlled oscillator (VCO) select
jumper (JP1), 2-17