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S3C8245/P8245/C8249/P8249 ADDRESS SPACES
2-7
PRIME REGISTER SPACE
The lower 192 bytes (00H–BFH) of the S3C8245/C8249's four or two 256-byte register pages is called prime register
area. Prime registers can be accessed using any of the seven addressing modes
(see Chapter 3, "Addressing Modes.")
The prime register area on page 0 is immediately addressable following a reset. In order to address prime registers
on pages 0, 1, 2, 3, or 4 you must set the register page pointer (PP) to the appropriate source and destination
values.
FFH
FCH
E0H
D0H
C0H
Set 1
Bank 0
Peripheral and I/O
General-purpose
CPU and system control
LCD data register
FFH
Page 3
Set 2
FFH
Page 2
Set 2
FFH
Page 1
Set 2
FFH
C0H
00H
BFH
Page 0
Set 2
Page 0
Prime
Space
LCD Data
Register Area
Page 4
00H
0FH
Bank 1
Figure 2-4. Set 1, Set 2, Prime Area Register, and LCD Data Register Map