Filter
Top Products
LCD CONTROLLER/DRIVER S3C8245/P8245/C8249/P8249
14-6
Table 14-4. LCD Mode Control Register (LMOD) Organization, D1H
LMOD.7 Always logic zero.
LMOD.6 Always logic zero.
LMOD.5 LMOD.4 LCD Clock (LCDCK) Frequency
0 0
32.768 kHz watch timer clock (fw)/2
9
= 64 Hz
0 1
32.768 kHz watch timer clock (fw)/2
8
= 128 Hz
1 0
32.768 kHz watch timer clock (fw)/2
7
= 256 Hz
1 1
32.768 kHz watch timer clock (fw)/2
6
= 512 Hz
LMOD.3 LMOD.2 LMOD.1 LMOD.0 Duty and Bias Selection for LCD Display
0 x x x LCD display off (COM and SEG output Low)
1 0 0 0 1/4 duty, 1/3 bias
1 0 0 1 1/3 duty, 1/3 bias
1 0 1 1 1/3 duty, 1/2 bias
1 0 1 0 1/2 duty, 1/2 bias
1 1 x x Static
NOTE: ‘x’ means don’t care.
Table 14-5. Maximum Number of Display Digits per Duty Cycle
LCD Duty LCD Bias COM Output Pins Maximum Seg Display
Static Static COM0 32
1/2 1/2 COM0–COM1 32 x 2
1/3 1/2 COM0–COM2 32 x 3
1/3 1/3 COM0–COM2 32 x 3
1/4 1/3 COM0–COM3 32 x 4